Automated Defect Scanning in Wafer Map - Python for Integrated Circuits - - An Online Book - |
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Python for Integrated Circuits http://www.globalsino.com/ICs/ | ||||||||
Chapter/Index: Introduction | A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z | Appendix | ||||||||
================================================================================= In the semiconductor industry, visible surface defects are mainly being inspected manually, which may result in inevitably erroneous classification. Many machine learning techniques-based recently pioneered arts in academia have been proposed to aid wafer failure pattern classification. Automatic methods, capable of quickly assessing the root causes of the defects by analyzing the data obtained from automated defect scanning, are very important to semiconductor manufacturing because these automatic methods can lead to a considerable reduction in operator workload and improvements in accuracy and consistency. On the other hand, these methods help engineers quickly assimilate manufacturing data from defect inspection tools and then translate those data into manufacturing solutions, enhancing both yield and reliability [1-3]. Note that, although many studies on automatic classification have been conducted, it is still hard to classify when two or more patterns are mixed on the same map. There have been numerous studies on the automatic retrieval of spatial features of defect clusters in semiconductor manufacturing. Examples of automatic methods are: In the method of automated defect scanning in wafer map, some problems are still remaining: To address the challenges, Geng et al. [7] combine the few-shot learning and self-supervised learning algorithms (see page4235), and design an end-to-end wafer failure pattern classifier as shown in Figure 4260. The advantages of their method are: Figure 4260. Wafer failure pattern classifier. [7]
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[1] P. B. Chou, A. R. Rao, M. C. Sturenbecker, F. Y. Wu, and V. H. Brecher, “Automatic defect classification for semiconductor manufacturing,” Mach. Vis. Appl., vol. 9, no. 4, pp. 201–214, 1997.
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